Sandeep Saini
Low Power Interconnect Design
Gebonden Engels 2015 2015e druk 9781461413226Levertijd ongeveer 9 werkdagen
Gratis verzonden
Samenvatting
This book provides practical solutions for delay and power reduction for on-chip interconnects and buses. It provides an in depth description of the problem of signal delay and extra power consumption, possible solutions for delay and glitch removal, while considering the power reduction of the total system. Coverage focuses on use of the Schmitt Trigger as an alternative approach to buffer insertion for delay and power reduction in VLSI interconnects. In the last section of the book, various bus coding techniques are discussed to minimize delay and power in address and data buses.
Specificaties
ISBN13:9781461413226
Taal:Engels
Bindwijze:gebonden
Aantal pagina's:200
Uitgever:Springer New York
Druk:2015
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Inhoudsopgave
Part I Basics of Interconnect Design.- Introduction to Interconnects.- CMOS Buffer.- Part II Buffer and Schmidt trigger Insertion Techniques for Low Power Interconnect Design.- Buffer Insertion as a Solution to Interconnect Issues.- Schmidt Trigger Approach.- Part III Bus Coding Techniques for Low Power Interconnect Design.- Bus Coding Techniques.
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